Books and Book chapters

I. Ahmed, "Pipelined ADC Design and Enhancement Technqiues", Springer, 2010

Roermund, Arthur H. M.; Casier, Herman; Steyaert, Michiel (Eds.), "Analog Circuit Design", Springer, 2010 (book chapter)

 

IEEE Copyright Statement:

IEEE owns the copyright to all material included below that is published by the IEEE. Personal use of this material is permitted. However, permission to use this material for any other purposes must be obtained from the IEEE by sending an email to pubs-permissions@ieee.org.

 

Journal Papers

I. Ahmed, J. Mulder, and D.A. Johns, "A low-power capacitive charge pump based pipelined ADC", Journal of Solid State Circuits (JSSC), vol 45, pp. 1016-1027, May 2010 [paper]

I. Ahmed, and D.A. Johns, "An 11-bit 45MS/s pipelined ADC with rapid calibration of DAC errors in a multi-bit pipeline stage", Journal of Solid State Circuits (JSSC), vol 43, pp.1626-1637, July 2008 [paper]

I. Ahmed, and D.A. Johns, "A high bandwidth power scaleable sub-sampling 10-bit pipelined ADC with embedded sample and hold", Journal of Solid State Circuits (JSSC), vol 43, pp.1626-1637, July 2008 [paper]

I. Ahmed, and D. A. Johns, “A 50MS/s (35mW) to 1kS/s (15uW) power scaleable 10b pipeline ADC using rapid power-on opamps and minimal bias current variation”, Journal of Solid State Circuits (JSSC), vol 40, pp. 2446-2455, Dec. 2005 [paper]

 

Conference Papers

I. Ahmed, D. Halupka, B. Leesti, J.A. Cherry, R. McKenzie, A. Nilchi, H. Mazhab-Jafari, M. Snelgrove, and R. Chik, "A 3-axis PZT-based MEMS Gyroscope in 0.18um CMOS", IEEE European Solid State Circuits Conference (ESSCIRC), September 2012, Bordeaux, France [paper] [slides]

A. Hasan, S.  Gregori, I. Ahmed, and R. Chik, "Monolithic DC-DC boost converter with current-mode hysteretic control", IEEE Canadian Conference on Electrical and Computer Engineering (CCECE), May 2011, Niagara Falls, Canada [paper]

I. Ahmed, J. Mulder, and D.A. Johns, “A 50MS/s 9.9mW Pipelined ADC with 58dB SNDR in 0.18um CMOS Using Capacitive Charge-Pumps”, IEEE International Solid State Circuits Conference (ISSCC), Feb. 2009, San Francisco, USA [paper] [slides]

I. Ahmed, and D.A. Johns, "An 11-bit 45MS/s pipelined ADC with rapid calibration of DAC errors in a multi-bit pipeline stage", IEEE European Solid State Circuits Conference (ESSCIRC), September 2007, Munich Germany [paper] [slides]  *This paper was recipient of the 'Young Scientist Award' (best student paper for works published at ESSCIRC 2007)

I. Ahmed, and D.A. Johns, "A high bandwidth power scaleable sub-sampling 10-bit pipelined ADC with embedded sample and hold", IEEE European Solid State Circuits Conference (ESSCIRC), September 2007, Munich Germany [paper] [slides]

I. Ahmed, and D.A. Johns, "DAC nonlinearity and residue gain error correction in a pipelined ADC using a split-ADC architecture", IEEE PhD Research In Micro Electronics (PRIME) Conference, June 2006, Otranto, Italy [paper] [slides]

I. Ahmed, and D. Johns, “A 50MS/s (35mW) to 1kS/s (15uW) power scaleable 10b pipeline ADC with minimal bias current variation”, IEEE International Solid State Circuits Conference (ISSCC), Feb. 2005, San Francisco, USA [paper] [slides]

 

Workshops/Symposiums

Imran Ahmed - AACD 2009 Workshop - session in 'Smart Data Converters', Advances in Analog Circuit Design 2009, to be held March 31-April 2nd 2009, Lund, Sweden

Imran Ahmed, and David Johns, “A 50MS/s (35mW) to 1kS/s (15uW) power scaleable 10b pipeline ADC with minimal bias current variation”, Micronet Annual Workshop, May 2005, Ottawa, Canada [abstract]

 

Poster sessions

“A 50MS/s (35mW) to 1kS/s (15uW) power scaleable 10b pipeline ADC with minimal bias current variation”, DAC/ISSCC student design competition, February 2005, San Francisco, USA [poster]

“A 50MS/s (35mW) to 1kS/s (15uW) power scaleable 10b pipeline ADC with minimal bias current variation”, Micronet Annual Workshop, May 2005, Ottawa, Canada

“A 50MS/s (35mW) to 1kS/s (15uW) power scaleable 10b pipeline ADC with minimal bias current variation”, DAC University booth, June 2005, Anaheim, USA

 

Theses:

Imran Ahmed, “Pipelined ADC enhancement techniques”, Ph.D. Thesis, University of Toronto, 2008

Imran Ahmed, “A power scaleable and low power pipeline ADC using power resettable opamps”, M.A.Sc. Thesis, University of Toronto, 2004 [download thesis]

Imran Ahmed, “Wide-Frequency-Range Tunable LC Oscillator”, B.A.Sc. Thesis, University of Toronto, 2002

 

Research based Awards and Distinctions

2008 Analog Devices Outstanding Student Designer Award

Young Scientist award for best student paper at ESSCIRC 2007

Awarded first place in the operational category and best overall submission for the 42nd ISSCC/DAC student design contest (2005).

[submission in pdf]

Media coverage: [1] [2] 
[SSCS newsletter feature]

Received prestigious Canadian Graduate Scholarship (CGS-D) in 2006 for excellence in research, and Post Graduate Scholarship (PGS-M) in 2002.

 

Awarded Ontario Graduate Scholarship (OGS) 2002, 2004-2005

Awarded University of Toronto Fellowship 2002-2008